Direct-to-chip liquid cooling field guide for AI data centers

Direct-to-chip cooling, and what sits on the chip

Direct-to-chip liquid cooling is a method that clamps a cold plate straight onto the processor and runs coolant through that plate to pull heat off the silicon where it is made. People also call it DTC, D2C, or cold-plate cooling, and the names are interchangeable. The plate is a sealed metal block with fine internal channels. Coolant flows in cool, picks up the chip's heat through the plate, and flows out warm, carrying the load away in liquid instead of air.

The reason it exists is heat flux. A modern AI accelerator concentrates 700 to 1,400 watts into a package the size of a deck of cards, and you cannot move that much heat off that small an area with air no matter how hard you blow. Liquid sits inches from the die and holds far more heat per unit volume than air, so it clears the watts that air physically cannot reach.

What surprises people new to it is that direct-to-chip does not cool the whole server. The cold plate takes the hottest parts, the CPUs and GPUs, and air still handles the memory, the drives, and the power supplies. So a direct-to-chip rack is a hybrid, liquid on the chips and air on the rest, not a sealed liquid box. Hold that picture, because most of the design decisions in this guide come back to it.

Why do AI data centers need liquid cooling?

AI data centers need liquid cooling because the chips driving them put out more heat than air can carry away, full stop. A training GPU that ran 300 to 400 watts a few years ago now runs 700 watts, then 1,000, then 1,400 as each generation lands, and the racks pack dozens of them tight to keep the network short. The heat per rack jumped from something air handled into a range air cannot.

The math is brutal at the rack. A dense AI rack today can pull 80, 100, or past 120 kW, where a reference platform like the GB200 NVL72 lands around 120 kW in a single rack. Air-cooled halls were built around something closer to 10 to 20 kW. You are not asking air to work harder. You are asking it to do something it physically cannot, which is why the liquid is not a preference, it is the only way the silicon runs.

This is the why-now in one line: the chip vendors set the thermal target, and that target moved past air. Once a GPU's thermal design power crosses what a heatsink and fans can shed, the cold plate is not an upgrade. It is the entry ticket to running the chip at all. Everything downstream, the loops, the coolant, the CDU, follows from that one fact.

Where air cooling runs out

Air cooling tops out at a per-rack power level, and the AI densities blow past it. The commonly cited practical ceiling for a well-built air-cooled rack lands somewhere around 30 to 50 kW, depending on the containment, the airflow, and how much fan noise and fan energy you are willing to spend. Push past that and the air volume you need stops being deliverable through a rack.

The limit is not really about the cooling medium being weak. It is about heat flux at the package. Air can carry a lot of total heat through a big enough coil, but it cannot pull a high enough heat flux off a 1,000-watt die through a heatsink. The boundary layer at the chip surface chokes the transfer. Once the flux at the package exceeds what air can lift, no amount of room cooling downstream saves the chip.

So the density jump is the whole story. A 10 kW rack is an air problem. A 50 kW rack is a hard air problem you can sometimes still solve with containment and high static-pressure fans. A 120 kW AI rack is not an air problem at all, and pretending it is gets you throttled chips and a hall that cannot hold its temperatures. That is the line direct-to-chip exists to cross.

What is a cold plate?

A cold plate is the sealed metal block that mounts on top of the chip and carries coolant through internal channels to take the heat off. It is the core component of direct-to-chip cooling, the part that actually does the work. Most are machined or skived copper or aluminum with micro-channels inside, sized so the coolant moves fast enough to keep the chip surface cool but not so fast it costs needless pumping power.

The heat path runs die, thermal interface material, plate wall, then coolant. The thermal interface material between the chip and the plate matters more than its size suggests. A thick or poorly applied layer of paste or a bad pad adds thermal resistance right at the hottest point, and a plate that is starved of even contact pressure across the die leaves a hot corner the coolant never reaches. The mounting force and the interface are where a good plate goes bad.

The channels inside are the narrowest, most fragile part of the whole system. They are fine on purpose, because fine channels give more surface area and better heat transfer, but fine channels also clog. A speck of construction debris or a flake of corrosion that would pass through a pipe unnoticed can choke the one cold plate it lands in, and that plate is on a chip worth more than the truck you drove to site. This is why the loop has to be clean before a plate is ever connected, which the liquid cooling loop commissioning guide covers in full.

The two loops: technology coolant and facility water

Direct-to-chip cooling is built as two loops joined by a heat exchanger, and getting the two straight is the first thing to learn. The technology cooling system, the TCS, is the clean secondary loop. It runs from the coolant distribution unit out to the racks, up the rack manifold, and through the cold plates, and it is the only liquid the chips ever see. The facility water system, the FWS, is the primary loop, the building chilled or condenser water that a plant makes and a tower or dry cooler rejects.

The two loops do not mix. The coolant distribution unit sits between them with a heat exchanger that passes heat from the TCS into the FWS without passing a drop of water across. That split is the entire point. The facility water can be dirtier, warmer, and at building pressure, while the technology coolant stays clean, filtered, conditioned, and held at the temperature and pressure the cold plates need. Separate the two and a problem on the building side stays on the building side.

Keep the loop names in your head and most of the rest of the system falls into place. The TCS is the loop you protect, because it touches the silicon. The FWS is the loop that carries the heat the rest of the way out of the building. The CDU is the wall between them, and the CDU commissioning guide covers that box in depth.

The CDU, kept brief

The coolant distribution unit, the CDU, is the package of pumps, a heat exchanger, filtration, and controls that conditions and isolates the technology coolant loop feeding the cold plates. It is the heart of a direct-to-chip deployment. The chips never touch facility water. They touch the coolant the CDU makes, at the temperature, flow, and pressure the CDU holds.

Two kinds show up. A liquid-to-liquid CDU rejects the rack heat into facility water through a plate heat exchanger, which is the workhorse of a built-out hall and carries the big capacities. A liquid-to-air CDU rejects straight into room air through a coil and skips the facility water loop, which suits an edge site, a retrofit, or a proof-of-concept row that has to stand up before a water plant is ready.

That is enough on the box for this guide. What the CDU has to prove, how its heat exchanger and N+1 pumps and dew-point control earn acceptance, and the test sequence that signs it off all live in the CDU commissioning guide. Read that one for the unit itself.

Manifolds and quick-disconnects

Inside the rack, the manifold is the vertical header that splits supply coolant out to each server and gathers the return. It is plumbing, but it is the plumbing that decides whether the flow reaches every node evenly or starves the top of the rack while the bottom runs cold. A poorly balanced manifold leaves one server's cold plates short of flow, and that server throttles while its neighbors are fine.

The connection between the manifold and the server is the quick-disconnect, the QD. These are dripless couplings, which means they seal both halves as they part so you can pull a server without draining the loop and without a puddle on the cabinet floor. Good QDs are dry-break, losing a drop or less on disconnect. Cheap or worn ones weep, and a weep onto a powered server is exactly the failure the whole system is built to avoid.

The hoses and the QDs are also a maintenance discipline, not just hardware. A QD that is cross-threaded, not fully latched, or fouled with a trapped particle is a leak waiting for vibration to find it. Connect them clean, latch them fully, and confirm the seat, because the QD is the part a tech touches most often and the part most likely to be the source when coolant shows up where it should not be.

Single-phase vs two-phase direct-to-chip

There are two flavors of direct-to-chip, and the difference is whether the coolant changes state. Single-phase keeps the coolant liquid the whole way through the cold plate. It flows in, warms up, flows out, and never boils, carrying heat as a temperature rise in the liquid. This is the mature, default choice today, and most deployments and most of the market run single-phase because it is simpler, cheaper, and well understood.

Two-phase lets the coolant boil on the cold plate. A dielectric or refrigerant fluid hits the hot plate, vaporizes, and carries heat away as latent heat of vaporization, which moves far more heat for a given flow and holds the chip at a tighter temperature. The trade is complexity. You are now managing a boiling fluid, vapor, and pressure inside the loop, the fluids cost more, and the fluid handling is harder. Two-phase is expected to scale as chip power climbs past what single-phase comfortably holds, with broader adoption projected over the next few years.

The honest read for now: single-phase is what you will see on most jobs, and two-phase is the technology to watch as TDP keeps rising. Do not assume a deployment is one or the other. Confirm which it is before you plan anything, because the coolant, the pressures, the leak behavior, and the service procedure all differ between them.

The technology coolant: water, glycol, and dielectric

The technology coolant is the fluid in the secondary loop, and it is chosen for heat capacity, freeze and corrosion protection, and material compatibility, not for whatever is cheapest in a drum. Single-phase loops usually run water or a water-glycol mix. A common one is PG25, roughly 75 percent water to 25 percent propylene glycol, which keeps most of water's heat-carrying ability while adding freeze protection and a corrosion-inhibitor package. Propylene glycol is the usual choice over ethylene glycol because it is less toxic around a populated building.

Two-phase loops run a dielectric or refrigerant instead, a fluid that does not conduct electricity and boils at a useful temperature for the chip. Some single-phase niche designs use a dielectric too, where the owner wants the fluid itself to be non-conductive so a leak onto live electronics is less catastrophic. Water-glycol is the common case; dielectric is the hedge against the leak.

Whatever the fluid, the coolant is a managed thing, not fill-and-forget. It carries an inhibitor package that depletes, it has a quality spec for conductivity and particulate, and it gets sampled on a schedule. The chip vendor and the CDU manufacturer both publish what fluid is approved and to what spec, and running an off-spec fluid to save money is how you foul cold plates and void the support you paid for. Use the approved coolant to the approved spec, every time.

What is the difference between direct-to-chip and immersion cooling?

Direct-to-chip and immersion are both liquid cooling, but they wet different things. Direct-to-chip puts a sealed cold plate on the hot chips and leaves the rest of the server in air, so liquid carries roughly 70 to 80 percent of the rack heat and air handles the remainder. Immersion drops the whole server into a bath of dielectric fluid, so the fluid touches everything and carries essentially all the heat. Rear-door cooling is a third member of the family, an air-to-liquid coil that replaces the rack's back door and pulls heat out of the exhaust air as it leaves.

Each has a place. Direct-to-chip is the mainstream choice for AI racks because it bolts onto a fairly conventional server and rack, reuses much of the existing air-handling, and scales to the densities the GPUs need. Immersion is the most efficient of the three and reaches the highest densities, but the tanks are heavy, the fluid has to be stored and handled, and retrofitting it into an existing hall is the hardest of the three. Rear-door is the gentle entry point, can capture up to nearly all of a rack's heat at moderate densities, and is the lowest-disruption way to add liquid to an air hall.

The short version: rear-door for moderate density with minimal change, direct-to-chip for high-density AI on a conventional rack, immersion for the extreme densities and the best efficiency if you can take the weight and the fluid handling. The right one is a building and density decision, not a religion.

The air that does not go away

A direct-to-chip rack still needs air, and missing that is the most common planning error on these jobs. The cold plate takes the CPUs and GPUs, but the memory, the drives, the network cards, and the power-delivery components are not on the loop, and they still make heat. That residual load is real, commonly the 20 to 30 percent of the rack the liquid does not carry, and it has to go somewhere.

So the hall is not done when the liquid is plumbed. You still need air handling sized for that residual load, and on a dense rack 20 to 30 percent of 100 kW is 20 to 30 kW of air cooling per rack, which is not a rounding error. Teams that budget the chilled-water and CDU capacity for the chips and forget the residual air end up with memory throttling and power supplies running hot in a rack they thought was solved.

Plan the rack as a hybrid from the start. Size the liquid path for the chip load and size the air path for the residual, and confirm both against the server vendor's split, because the exact fraction depends on the chip, the board, and the platform. Liquid did not eliminate the air. It just took the part air could not do.

Heat reuse and the warm-water angle

One real advantage of direct-to-chip is that it produces warm liquid, and warm liquid is reusable in a way that warm exhaust air never was. Because the cold plate can run with a fairly warm coolant and still cool the chip, the return liquid comes back at a temperature high enough to be useful for heating instead of just being thrown away at a tower.

That opens heat reuse. The warm return water can feed a district heating loop, preheat a building's hot water, or warm an adjacent space, turning a waste stream into something the site or the neighborhood uses. It is the cleanest sustainability story in the liquid-cooling pitch, because the heat was going to exist regardless, and capturing it costs far less than making that heat somewhere else.

The catch is that reuse needs a customer for the heat and the temperature to match the use. The economics work where there is a district system or a building load that can take the warm water nearby. Where there is no taker, the heat still has to be rejected at a tower or dry cooler. Worth designing for where the site allows it, not a guaranteed win on every job.

The facility side behind the loop

Behind every direct-to-chip loop there is a facility water system doing the final heat rejection, and the CDU is only as good as what feeds it. The facility loop is the building water that the CDU's heat exchanger dumps the chip heat into, and it ends at a cooling tower, a dry cooler, or a chiller, depending on the climate and the supply temperature the design targets.

The big lever here is warm-water cooling. Because the chips tolerate a warmer coolant than legacy IT did, the facility loop can often run warm enough to reject heat with a dry cooler or a tower running in free-cooling mode for much of the year, skipping the chiller's compressor energy. ASHRAE's liquid-cooling water classes describe these warmer supply ranges, and the warmer the loop the more free-cooling hours the site gets.

Commission the facility side alongside the CDU, because a CDU starved of facility water cannot make its capacity no matter how good its pumps are. The air-side and chilled-water architecture is its own large subject, and the cooling pillar covers the plant and tower in depth. The point to carry here is that the loop on the chip does not work without the loop in the yard.

How do you keep a leak from killing the hardware?

Liquid inches from energized electronics is the headline risk of direct-to-chip, and the answer is layered, not a single gadget. Start with the connections, because most leaks happen at joints, not in the middle of a hose. Dripless quick-disconnects, properly seated, mean a service event does not become a spill. Good hose routing and strain relief keep vibration from working a fitting loose over months.

Then detect it fast. The widely deployed method is resistive leak-detection cable, a continuous sensing element run under the racks, along the pipe routes, at the manifold low points, and beneath the CDU, that alarms the moment it touches liquid and can trigger an automatic isolation valve to close. Tie that into the building management system so a leak shuts its zone, not just blinks a light nobody is watching.

Some designs go further and run the loop at negative pressure, below atmospheric, so a breach pulls air in rather than pushing coolant out. A negative-pressure loop turns a leak into a bubble instead of a puddle, which is a strong protection where the design supports it. Whatever the combination, the leak strategy is the part of a direct-to-chip job worth being blunt about: a slow weep onto a GPU tray that nobody catches for a weekend can cost more than the cooling system. Design for the leak you will eventually have, not the one you hope you will not.

Coolant quality, filtration, and biology

The technology coolant fouls if you let it, and a fouled cold plate is a throttled chip. Three things go wrong in the loop over time: particulate, corrosion, and biology. Particulate is construction debris and wear products that settle in the fine cold-plate channels and choke flow. Corrosion is metal going into solution and depositing where it is not wanted. Biology is microbial growth, the slime that forms in any warm water loop that is not chemically controlled.

The defenses are filtration, chemistry, and discipline. The CDU carries filtration sized to keep particulate below the cold-plate spec, and those filters get changed on a schedule, not when someone remembers. The coolant carries a corrosion inhibitor and, where needed, a biocide, and that chemistry depletes and has to be sampled and topped up. A loop that was filled two years ago and never sampled is a loop that is quietly fouling.

The other half is flushing before fill. A new loop is full of cutting oil, flux, and debris from fabrication, and that has to be flushed out to a particulate target before a single cold plate is connected, or you push the construction dirt straight into the chips. The flush, the fill, and the cleanliness target are commissioning work, covered in the liquid cooling loop commissioning guide. The operating lesson here is that clean is a state you maintain, not a box you check once.

Wetted materials and galvanic trouble

Every material the coolant touches has to be compatible with the coolant and with the other wetted materials, and getting this wrong corrodes the loop from the inside. The wetted set is the cold plates, the manifolds, the hoses, the QDs, the CDU internals, the gaskets, and the fittings. Mix the wrong metals in the same loop and you set up a galvanic cell, where one metal sacrifices itself to protect the other and you get corrosion and metal in solution that then deposits in the cold plates.

The classic mistake is putting aluminum and copper in the same wetted loop without the right inhibitor chemistry. Aluminum is anodic to copper, so in a shared loop the aluminum corrodes preferentially, and the corrosion products travel to the narrow channels and choke them. The cold-plate metal, the manifold metal, and the piping have to be chosen as a system, with a coolant inhibitor package matched to them.

This is why the approved-materials and approved-coolant lists exist, and why substituting a fitting or a hose because it was on the shelf is a real hazard, not a shortcut. The chip and CDU vendors specify the wetted materials and the compatible fluid together. Honor both lists, because a single incompatible elbow can seed the corrosion that takes out cold plates across the whole loop.

Serviceability and hot-swapping a server

A direct-to-chip rack has to be serviceable without draining the loop, and the dripless quick-disconnect is what makes that possible. When a server needs to come out, a tech unlatches its QDs, which seal both halves as they part, pulls the node, and the rest of the rack keeps cooling. No drain, no refill, no spill, and the neighbors never lose coolant.

That only holds if the QDs are good and the procedure is followed. A dry-break QD loses a drop or less on a clean disconnect. A worn coupling, a tech who unlatches under pressure, or a fitting that was never seated right turns a routine swap into a leak event on a powered rack. The service discipline is as much a part of the cooling system as the hardware, and it is where a hall with sloppy procedures eventually pays for it.

Design for the swap from the start. Hoses long enough to reach, QDs accessible without fighting the rack, and isolation where the procedure needs it. A rack that is a misery to service is a rack where techs improvise, and improvised liquid work near GPUs is exactly the risk the dripless coupling was bought to remove.

Redundancy in the loop and the CDU

The cooling cannot stop, because a dense rack of GPUs overheats in seconds, not minutes, when flow is lost. So redundancy is built into the parts most likely to fail. The CDU's pumps are commonly N+1, meaning one extra pump beyond what the load needs, so a pump failure does not stop the flow. Filtration and valving are arranged so a filter change or a component swap can happen without taking the loop down.

Past the CDU, the redundancy question runs up the whole chain: dual CDUs feeding a row, redundant facility-water paths, and the standby power that keeps pumps turning through a utility event. A loop that is single-path from the chip to the tower has a single point of failure on a system where failure cooks hardware, so the design hedges the parts that matter and proves the failover actually works.

Proving it is the part that gets skipped. A nameplate that says N+1 means nothing until you kill the lead pump under load and watch the standby pick it up without the chip temperatures running away. That failover test is CDU commissioning work, covered in the CDU guide. The principle to carry is that redundancy you have not tested is redundancy you do not have.

Commissioning and flushing the loop

A direct-to-chip loop is proven before any chip sees coolant, and the sequence is its own discipline. The loop gets flushed to a particulate target to clear fabrication debris, pressure-tested to prove it holds, leak-checked with the detection proven to actually alarm, then balanced so every rack and every cold plate gets its design flow. Only after that does coolant go in and hardware get connected.

The order is deliberate. Flush before you fill, because the construction dirt has to leave before the cold plates arrive. Prove leak-tight before you energize, because a leak found at hydrotest is a maintenance note and a leak found after the GPUs are in is a disaster. Balance the flow, because an unbalanced loop starves the far rack while the near rack runs cold.

This guide stays on what direct-to-chip is and how it is put together. The full flush, fill, hydrotest, leak-check, and flow-balance sequence, with the targets and the acceptance criteria, lives in the liquid cooling loop commissioning guide, and the CDU's own acceptance lives in the CDU commissioning guide. Read both before you write a test plan.

Retrofit versus new build

Adding direct-to-chip to an existing air-cooled hall is harder than building it in, and the deciding factor is usually facility water. A new build runs the facility water loop, sizes the plant, and lays out the rows around liquid from the start. A retrofit has to find capacity and a path for facility water in a building that was never plumbed for it, and that is often the real constraint, more than the racks themselves.

Where a retrofit has no facility water to reach, a liquid-to-air CDU is the common bridge, rejecting the chip heat into the room air and leaning on the existing air handling. That gets liquid onto the chips without a new water plant, but it does not reduce the building heat load, it relocates it into the room, so the air-side has to absorb what the CDU dumps back. Know that trade before you promise a density the room cannot actually take.

Either way a direct-to-chip rack stays hybrid, so a retrofit keeps the air handling it already has for the residual load and adds the liquid path for the chips. The honest framing for an owner is that retrofitting liquid is a facility-water and floor-loading question first and a rack question second. Answer the water question before you commit to the density.

The GPU trend pulling everything toward liquid

The direction of travel is one way, and it is set by the chips. Each GPU generation lands hotter than the last, the rack power climbs with it, and a larger share of every new build's heat goes to liquid because air ran out of room. The gigawatt-scale AI campuses being built now are being designed liquid-first, because at those densities there was never an air option to design around.

This is the trend worth understanding even if your current hall is air: liquid is becoming the default for anything running serious AI or HPC, and the skills, the standards, and the supply chain are reorganizing around it. The chip vendors publish reference cooling designs for their platforms now, because the cooling and the silicon are sold as one system, and the rack power that a few years ago was an outlier is the new baseline.

None of that makes air obsolete. The residual load keeps air in every direct-to-chip rack, and plenty of workloads will never need liquid. The shift is specific: the high-density AI and HPC end of the market has moved to liquid and is not moving back, and direct-to-chip is the form most of that market took.

Efficiency: why liquid lowers PUE

Direct-to-chip is more efficient than air for high-density loads, and the gain shows up in a few places at once. Liquid moves heat with far less energy than blowing large volumes of air, so the fan energy in the servers and the hall drops. Warm-water operation lets the facility loop reject heat with free cooling for much of the year, cutting or skipping the chiller compressor energy that dominates an air hall's overhead.

Put together, those reductions pull down PUE, the ratio of total facility power to IT power, because the cooling overhead shrinks relative to the compute it serves. The exact PUE depends on the climate, the supply temperature, and how much of the year free cooling is available, so treat published figures as design targets tied to a specific site, not a number you inherit.

The efficiency case is real but it is not automatic. A direct-to-chip hall that runs its loop colder than it needs to, or that never uses the free-cooling its warm-water design allows, gives back much of the advantage. The efficiency comes from running the loop as warm as the chips tolerate and rejecting heat the cheap way whenever the weather allows it.

What to document

A direct-to-chip system that is not documented is a system the next operator cannot run safely, and the time to capture it is at install and commissioning, not after the first incident. Write down the loop architecture, the coolant and its spec, the materials, the redundancy scheme, and the leak strategy, so the people who inherit the hall know what they have and what they have to maintain.

Common mistakes

• No leak detection, or detection that alarms but does not isolate the zone automatically.
• Off-spec or unsampled coolant that depletes its inhibitor and fouls the cold plates.
• Mixing incompatible wetted metals, like aluminum and copper, and seeding galvanic corrosion.
• Forgetting the residual air load and undersizing the air handling for memory and power.
• Undersizing the CDU or starving it of facility water so it cannot make its capacity.
• Single-path cooling with no N+1, or N+1 on the nameplate that was never failover-tested.
• Poor quick-disconnect discipline: unseated, cross-threaded, or disconnected under pressure.
• Skipping the flush before fill and pushing construction debris straight into the cold plates.

Field checklist

Standards and references

Direct-to-chip cooling sits inside a thin but growing set of references, and the chip vendor's design is usually the controlling document. ASHRAE TC 9.9 publishes the thermal guidelines and the liquid-cooling water classes, the W-class ranges that describe the supply temperatures a loop can run, including the warmer ranges that enable free cooling. Treat the specific class temperatures as the published ranges and confirm them against the current edition, because the guidance is revised as the hardware moves.

The Open Compute Project publishes cooling and liquid-distribution reference designs and guidance that much of the industry aligns to, including the convergence that automated leak detection and coolant-quality monitoring are baseline, not optional. The chip vendors, NVIDIA and its peers, publish reference cooling designs for their platforms, and because the cooling is sold with the silicon, that reference is often the practical spec the job is built to.

Beyond those, the CDU and manifold manufacturers publish the coolant spec, the wetted-materials list, the cleanliness target, and the supply temperature and flow their equipment needs. Hedge the temperatures and the percentages to the design and the vendor, because they vary by platform and generation. When a chip vendor's reference design and a generic figure disagree, the reference design for the hardware you are cooling wins.

Units and terms

Direct-to-chip carries its own vocabulary, and the same idea shows up under several names across a vendor sheet, a spec, and a drawing set. The terms below are the ones that cause the most confusion on a first job.

DTC / D2C / cold-plate

Direct-to-chip liquid cooling, a cold plate on the chip with coolant flowing through it

Cold plate

Sealed metal block with internal micro-channels mounted on the CPU or GPU to take its heat

TCS

Technology cooling system, the clean secondary coolant loop that feeds the cold plates

FWS

Facility water system, the primary building loop the CDU rejects heat into

CDU

Coolant distribution unit, the pumps, heat exchanger, and controls between the two loops

QD

Quick-disconnect, a dripless coupling joining a server to the manifold for service

Single-phase / two-phase

Coolant stays liquid (single-phase) or boils on the cold plate (two-phase)

PG25

A water-glycol coolant, roughly 75 percent water to 25 percent propylene glycol

TDP

Thermal design power, the heat a chip is designed to dissipate, in watts

W-class

ASHRAE liquid-cooling water classes describing supply temperature ranges

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